M-Systems' "DiskOnChip Millennium Plus," a 16-bit 32Mbytes NAND flash disk solution in a TSOP-1 package with 1Kbyte of XIP boot-block, eliminates the need for a separate boot device, making the traditional PC architecture with BIOS chip obsolete. While NAND technology was clearly superior to NOR technology for data storage, it always had to be accompanied by another flash device for booting purposes; thus, two flash devices were always necessary. M-Systems has designed a revolutionary solution that combines boot with data storage capabilities into one chip. Computer system vendors can use this solution to gain a competitive advantage in today's rapidly changing marketplace. It allows them to lower costs of their systems and simplify design, thus resulting in quicker time to market.

To better understand the uniqueness of M-Systems' solution and the superiority of its DiskOnChip technology over other flash technologies, let me first explain flash memory, the major differences between NAND and the most common flash technology NOR, as well as the traditional booting sequence of a computer system.

What is Flash Memory?
Flash memory is a type of constantly powered nonvolatile memory that can be erased and reprogrammed in units of memory called blocks. because the name derives from how the microchip is organized; a section of memory cells is erased in a single action or "flash." Flash is actually a variation of the EEPROM with much faster updating speed. All flash technologies work on the same principle: to store information, electrons are transferred into and out of part of a transistor cell called a floating gate (Figure 1). The number of electrons in the floating gate determines a transistor's threshold voltage, thereby determining its data content.

Figure 1: Flash Cell

The most common flash types are NOR and NAND and they can be differentiated from each other by the mode in which a CPU can access the data stored in them. NOR flash was designed to replace the EPROM in applications that execute code directly from the memory device. NOR has random access type architecture and minimizes access time for random reads-through memory. For this reason, it is typically used for code storage. For example, a firmware that is stored in a flash memory is updated infrequently and it is executed directly out of the flash chip.

Another functionality offered in NOR flash, unavailable so far in NAND, is the ability to perform eXecute-In-Place (XIP). XIP is the execution of an application directly from the flash instead of having to download the code into the system's RAM before executing it. However, today's CPUs can execute commands much faster when they read them from RAM than from flash and therefore even with NOR, designers are choosing to copy the application to the system's RAM and execute it from there.

NAND flash was designed mainly for mass storage and implements a sequential access type architecture which minimizes the cell size and the cost. For this reason, it is typically used for data storage where high capacities (i.e. more then 4Mbytes) are needed. For example, a hand-held device that runs a Real-Time Operating System (RTOS) will store the programs as files and load it from the flash disk into memory. On the flash disk, individual files may be updated, while in the firmware example usually the entire content of the flash is updated.

Superior NAND Performance for Data Storage

NAND technology has always been a superior data storage medium where flash storage was a necessity. Targeting the emulation of disk drives, NAND technology breaks down the medium into pages, typically 256bytes or 512bytes per page. Those pages are just like the hard drive's sectors and thus provide a known environment to the system. The data is stored and retrieved from the flash by transferring a full page during every access. The erase transaction with NAND is faster then with NOR because the erase block size is only 8Kbytes compared with 64Kbytes. For example, with NOR, even when only 1byte needs to be updated, a whole section of 64Kbytes must be erased and then rewritten. Clearly, it takes less time to erase and update 8Kbytes than 64Kbytes.

Traditional Sequence after Computer Power-On:
Using two devices; one for booting and another for storage
The traditional approach for initializing the system consists of a boot device, CPU, DRAM and a disk. When power is supplied to the system and a reset signal is generated, the components change from an unknown state to a known state but are not accessible yet. Once the reset signal is negated, all components are still in the same pre-determined state but can be accessed. The address that the CPU places on the bus at this stage points to a location in memory that contains the reset vector. In order to ensure compatibility, this address is typically both at the top (i.e., 0xFFFFFFF0) or bottom (i.e., 0x00000000) of the CPU's address space. Only after it accessed this address can the CPU start to fetch instructions, data, or a jump address from the reset vector location. The reset vector is stored in a nonvolatile device, typically a ROM, EPROM or flash that supports direct code execution or eXecute In Place (XIP). These instructions usually initialize the hardware functions (i.e., chipset registers), copy the operating system and drivers from the disk into RAM and then start the operating system. Once the operating system is loaded into the system's RAM, it takes control over the system.

DiskOnChip as the Ultimate Local Storage Device
Because NAND flash is superior in the areas mentioned above, M-Systems' flash-based DiskOnChip product line is based on it. The DiskOnChip series includes M-Systems' proprietary True Flash File System^® (TrueFFS ) technology, providing complete read and write capabilities and hard disk emulation at both sector and file levels . The TrueFFS also takes care of power failures and provides data reliability, error detection and correction (48Bit Reed-Solomon EDC/ECC Algorithm), bad block management and wear-leveling. This technology went into the development of one of M-Systems' latest products, the DiskOnChip Millennium Plus. The purpose was to achieve a sustained write speed beyond increased performance. Designers have requested a simplified design and less product on the board for which M-Systems met the call with combined data storage and boot functionality. With the DiskOnChip Millennium Plus, the sustained write speed is over 1.5Mbytes per second, sustained read speed is over 3.0Mbytes per second and the burst read/write transfer is of 20Mbytes per second.

Figure 2: DiskOnChip Millennium Plus Block Diagram

Using One chip That Does It All:
Combining data storage and boot functionality - The DiskOnChip
Using M-Systems' boot replacement technique, the DiskOnChip Millennium products can be the boot device for both the basic hardware initialization code and the operating system. This eliminates the need for a separate boot flash chip which saves both cost and handling efforts. The CPU can fetch and execute the boot code directly from the XIP boot-block on the DiskOnChip. It then loads the remainder of the boot code from the NAND flash memory into the system's RAM and continues the standard boot process.

The traditional boot sequence, as previously described, is modified when using one of the DiskOnChip Millennium products or the DiskOnChip2000 TSOP. The modified process includes two additional phases contained in two code modules (Figure 2). The first code module, known as the Initial Program Loader (IPL), is responsible for initializing the minimum hardware set-up, loading the next piece of code from the DiskOnChip into the system's RAM and executing it. The second code module loads the rest of the initialization code, referred to as the Secondary Program Loader (SPL), from the DiskOnChip into the system's RAM. Figure 3 illustrates the binary partition for the DiskOnChip of the two code modules.

Figure 3: DiskOnChip Millennium Binary Partition

Figure 4 depicts the chain of events that takes place when the system goes through the process of start-up and boot, when the CPU board wakes up after reset, the IPL code is automatically transferred from the first block of flash (Step 1) into the XIP boot-block of the DiskOnChip. This operation is required because the XIP boot-block is actually a small area (512bytes or 1Kbytes) of SRAM (volatile memory). When the CPU fetches the reset vector, it points to the XIP boot-block of the DiskOnChip, where the IPL resides (Step 2). The IPL consists of a stripped down routine that operates the checksum test only on a small portion of the system's RAM, just enough to contain the SPL code. The IPL copies the SPL to the system's RAM and then the SPL code is executed (Steps 3 & 4). From this stage on, the boot process is the same as the traditional one. The rest of the system's RAM is scanned, all the hardware functions are initialized, the operating system is copied to the system's RAM (Step 5) and takes control (Step 6).

Figure 4: Interaction of Software Components at Boot Process

Summary
While so far systems had one flash chip storing BIOS and another storing data, M-Systems has come up with a single chip that does it all. With M-Systems' DiskOnChip2000 TSOP and DiskOnChip Millennium products, designers need to use only one device for boot and storage purposes. Designers using the DiskOnChip receive a boot device and first-in-class local storage device in one chip. These unique solutions lower design and operational costs while shortening time to market and providing a competitive advantage.

For more details contact Sharon Tikotzky [ SharonT@m-sys.com ] or visit M-Systems' web site www.m-sys.com